The present invention relates to a resin-packaged surface-mounting semiconductor device and a method of making the same.
FIGS. 14A-14C are sectional views illustrating the process steps of a prior art method for making a semiconductor device Y1. First, as shown in FIG. 14A, a semiconductor chip 8 is mounted on a conductor frame 9, and electrodes 80a, 80b respectively provided on the upper and the lower surfaces of the semiconductor chip 8 are electrically connected to a pair of lead portions 90 of the conductor frame 9 via a wire or a conductive adhesive. The conductor frame 9, which is generally called a lead frame, may be formed by punching or etching a metal plate of copper for example. The conductor frame 9 is formed with thin-walled etched portions 92a, 92b at each of the lead portions 90. The etched portions 92a, 92b are provided by etching the lead portions 90 from the lower surfaces 91a to a predetermined depth to form recesses 93a, 93b. 
Subsequently, as shown in FIG. 14B, a resin package 81 for sealing the semiconductor chip 8 and the wire W is formed. At this time, the resin package 81 is formed so that the lower surface 91a of each lead portion 90 is partially exposed at the bottom surface 81a of the resin package 81 and the thin-walled etched portions 92b project outward from the side surfaces 81b of the resin package 81. Then, each of the lead portions 90 is cut at the position indicated by a reference sign n1 in FIG. 14B.
The semiconductor device Y1 as shown in FIG. 14C is obtained by the above-described process steps. In the semiconductor device Y1, conductors 90A, each of which has formed a part of each lead portion 90, are partially exposed at the bottom surface 81a of the resin package 81, thereby providing terminals 94 for surface-mounting. Thus, the semiconductor device Y1 can be surface-mounted to a predetermined position by reflow soldering.
In the above-described method, each lead portion 90 is cut at the thin-walled etched portion 92b. Therefore, the cutting operation can be performed more properly and easily than in the case where the lead portion 90 is cut at a thick-walled portion. Moreover, the etched portion 92a is also provided at the lower surface 91a of each lead portion 90. Therefore, in the semiconductor device Y1 finally obtained, the upper surface 91b of each conductor 90A has an area sufficient for connecting the semiconductor chip 8 or bonding of the wire W whereas each terminal 94 has a predetermined configuration and an area which is smaller than that of the upper surface 91b. 
The prior art semiconductor device Y1 still has room for improvement. For example, as shown in FIG. 14C, when the semiconductor device Y1 is mounted to a mother board 95 for making a certain equipment or apparatus, a test is carried out for checking whether the solder bonding between the terminals 94 of the semiconductor device Y1 and terminals 95a of the mother board 95 has been properly performed. To perform the test relatively easily, the state of solder H used for the mounting can be visually checked with naked eyes or using an image capturing means such as a camera.
However, in the prior art semiconductor device Y1, each terminal 94 is located inward from the outer edge of the bottom surface 81a of the resin package 81. Therefore, the solder H applied between the terminals 94 and the terminals 95a exists only between the terminals in the mounting step by reflow soldering, and it is difficult to visually check the solder H from the outside. In the semiconductor device Y1, an end surface 96 of each conductor 90A is exposed at the side surface 81b of the resin package 81. However, the end surface 96 is separated from the bottom surface la of the resin package 81 by a predetermined height h. Therefore, in the mounting step by reflow soldering, it is unlikely that part of the solder H interposed between the terminals 94 and 95a rises up to the end surface 96 to provide a solder fillet. In this way, in the prior art semiconductor device Y1, a test for solder bonding cannot be conveniently carried out because the existence or state of the solder H cannot be visually checked.
FIG. 15 is a sectional view showing another prior art semiconductor device Y2. In the semiconductor device Y2, each conductor 90A includes a terminal 94 which reaches the outer edge of the bottom surface 81a of the resin package 81. Thus, the conductor 90A has an end surface 96 which is exposed at the side surface 81b of the resin package 81 as connected to the terminal 94. With this structure, when the terminal 94 is bonded to a terminal 95a of a mother board 95 by reflow soldering for example, part of the solder H can rise up to the end surface 96 to form a solder fillet Hf existing outside of the resin package 81. The presence of the solder fillet Hf facilitates the test for solder bonding. Specifically, it is possible to visually check, from the outside, whether the solder bonding is properly performed.
However, in the semiconductor device Y2, the portion of a conductor frame to be cut for providing each conductor 90A is not subjected to etching, thereby having a thickness t which is larger than that in the semiconductor device Y1. Therefore, the cutting operation is not easy, which may cause improper cutting of the conductor frame.
The present invention is conceived under the circumstances described above. An object of the present invention is to provide a semiconductor device which can be easily manufactured and which makes it possible to easily check the appropriateness of the surface-mounting when the semiconductor device Y2 is surface-mounted to a predetermined position via solder and, to provide a method for making such a semiconductor device.
According to a first aspect of the present invention, a semiconductor device is provided. The semiconductor device comprises: a plurality of conductors each of which includes a first surface, a second surface opposite to the first surface, and a thickness defined between the surfaces, and a thin-walled end portion retreating from the first surface toward the second surface and having a side surface connected to the second surface; a semiconductor chip having a plurality of electrodes electrically connected to the plurality of conductors, respectively; and a resin package for sealing the conductors and the semiconductor chip while exposing, for each conductor, the side surface of the thin-walled end portion and at least a part of the second surface connected to the side surface.
Preferably, at least one of the conductors is formed with an additional thin-walled end portion retreating from the second surface toward the first surface and surrounded by the resin package.
According to a second aspect of the present invention, a method of making a semiconductor device is provided. The method includes the steps of: mounting a semiconductor chip including a plurality of electrodes onto a conductor frame including a plurality of lead portions, each of the lead portions including a first surface, a second surface opposite to the first surface, and a thickness defined between the surfaces, and a thin-walled portion retreating from the first surface toward the second surface; electrically connecting the plurality of electrodes to the plurality of lead portions, respectively; forming a resin package for sealing the lead portions and the semiconductor chip while exposing the second surface of each lead portion so that the thin-walled portion projects outward; and cutting the thin-walled portion projecting from the resin package outside the resin package.
Preferably, in the resin sealing step, the resin package is formed so that the thin-walled portion of each lead portion extends from inside to outside the resin package.
Preferably, at least one of the lead portions is formed with an additional thin-walled end portion retreating from the second surface toward the first surface and surrounded by the resin package.
Preferably, the thin-walled portion is formed by etching the first surface of the lead portion.